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• CD4027 Dual JK Flip Flop Package IC which operates at medium speed of 16 MHz typically with 10V supply
• Voltage range of 3.0V to 15V
• Static Flip-Flop Operation
• High noise immunity of 0.45 VDD(typ.)
• Set and Reset capability
• TTL compatible
• Low power of 50 nW (typ.)
• Input Rise/Fall time at 5V: 45us
• Maximum and minimum Input Voltage is 2 V and 0.8 V

The CD4040 is a 12-stage ripple carry binary counter. The counters are advanced one count on the negative transition of each clock pulse. The counters are reset to the zero state by a logical 1 at the reset input independent of the clock.

• Wide supply voltage range: 3V to 15V
• Low power: 100 nW (typ.)
• High noise immunity: 0.45 VDD (typ.)
• Separate SET and RESET inputs for each latch
• NOR and NAND configuration
• 3-STATE output with common output enable

• Wide range of digital and analog signal levels: digital 3 – 15V, analog to 15Vp-p
• Low “ON” resistance: 80Ω (typ.) over entire 15Vp-p
  • signal-input range for VDD − VEE = 15V
• High “OFF” resistance:
  • channel leakage of ±10 pA (typ.) at VDD − VEE = 10V
• Logic level conversion for digital addressing signals of
  • 3 – 15V (VDD − VSS = 3 – 15V) to switch analog signals
  • to 15 Vp-p (VDD − VEE = 15V)
• Binary address decoding on chip

The 4077 is a quad 2-input EXCLUSIVE-NOR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance. The 4077 operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.